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FPGA-DE2-115-實(shí)驗(yàn)二-模塊化多功能數(shù)字鐘

這篇具有很好參考價(jià)值的文章主要介紹了FPGA-DE2-115-實(shí)驗(yàn)二-模塊化多功能數(shù)字鐘。希望對(duì)大家有所幫助。如果存在錯(cuò)誤或未考慮完全的地方,請(qǐng)大家不吝賜教,您也可以點(diǎn)擊"舉報(bào)違法"按鈕提交疑問(wèn)。


前言:
本文主要介紹了集成電路EDA這門(mén)課程的相關(guān)實(shí)驗(yàn)及代碼。使用的軟件是Quartus Ⅱ,該實(shí)驗(yàn)使用fpga芯片為cyclone IV EP4CE115F29C7。

1.實(shí)驗(yàn)要求

本次實(shí)驗(yàn)我們需要實(shí)現(xiàn)生活中常見(jiàn)的電子手表的所有功能。
我們知道:
電子手表有五個(gè)功能,包括:時(shí)間顯示功能,夜光模式功能,計(jì)時(shí)功能,鬧鐘功能,調(diào)時(shí)功能,
各功能實(shí)際效果介紹:

  • 時(shí)間顯示功能:正常狀態(tài)下,時(shí)間正常顯示時(shí)分秒
  • 調(diào)光功能:按下1鍵也就是light鍵表燈亮度會(huì)逐漸改變
  • 記時(shí)功能:按下2鍵也就是mooe鍵一次進(jìn)入計(jì)時(shí)功能,這時(shí)按下3鍵也就是start鍵開(kāi)始計(jì)時(shí),再次按下時(shí)間停止,再次則繼續(xù),按下4鍵也就是reset鍵即記時(shí)歸零。
  • 鬧鐘調(diào)整及實(shí)現(xiàn)功能:按下2鍵兩次進(jìn)入鬧鐘功能,這時(shí)按下3鍵調(diào)整當(dāng)前閃爍區(qū)域,按下4鍵更換區(qū)域。
  • 時(shí)間調(diào)整功能:按下2鍵三次進(jìn)入時(shí)間調(diào)整功能,這時(shí)按下三鍵調(diào)整當(dāng)前閃爍區(qū)域,按下4鍵更換區(qū)域。

2.實(shí)現(xiàn)過(guò)程

本次實(shí)驗(yàn)為了代碼優(yōu)美易于修正,整體上使用模塊化設(shè)計(jì)實(shí)現(xiàn)多功能數(shù)字鐘。
其中使用一個(gè)按鈕開(kāi)關(guān)調(diào)節(jié)模式mode:

  • 0.時(shí)間顯示功能
  • 1.記時(shí)功能
  • 2.鬧鐘調(diào)整功能
  • 3.時(shí)間調(diào)整功能

詳細(xì)使用FPGA資源如下:

  • 撥動(dòng)開(kāi)關(guān)SW[0] —用于系統(tǒng)復(fù)位即頂層模塊中的sys_rst_n,低電平有效
  • 4個(gè)按鈕開(kāi)關(guān)KEY3—KEY0,其中
    KEY3-light實(shí)現(xiàn)調(diào)光功能,
    KEY2-mooe調(diào)整當(dāng)前模式
    KEY1-start調(diào)整數(shù)據(jù)/計(jì)時(shí)啟動(dòng)
    KEY0-rst調(diào)整數(shù)據(jù)位置/計(jì)時(shí)復(fù)位
  • LED[17]-[14]用于顯示當(dāng)前mode,17亮則為mode0,16亮-mode1…
  • LED[0]閃爍用于模擬鬧鐘報(bào)警
  • 數(shù)碼管0-1顯示秒,3-4顯示分,6-7顯示時(shí),2和5顯示’-'將時(shí)分秒間隔開(kāi)來(lái)

多功能數(shù)字鐘的整體RTL視圖

quartus時(shí)鐘代碼,集成電路EDA,fpga開(kāi)發(fā),fpga
下面我將詳細(xì)介紹各個(gè)模塊及原理:

2.1 頂層模塊clock

統(tǒng)籌整個(gè)實(shí)驗(yàn)的整體,其中mode改變,led模式顯示,鬧鐘報(bào)警功能在此模塊實(shí)現(xiàn),其余都是調(diào)用模塊部分

/*	
    mode  (按下mooe按鍵+1) 
		0  顯示
                小時(shí):0-23
				分鐘:0-59
				秒:0-59
		1  計(jì)時(shí)
                分鐘:秒:99   
				start-->開(kāi)始計(jì)時(shí)(1)-->暫停計(jì)時(shí)(0)-->開(kāi)始計(jì)時(shí)...
				reset-歸零
		2 鬧鐘設(shè)置
				start--加1(默認(rèn)分鐘)
				reset--切換小時(shí)/分鐘設(shè)置		默認(rèn)分鐘-->小時(shí)-->分鐘
					小時(shí):0-23
					分鐘:0-59
		3 時(shí)間設(shè)置
				start--
					秒(默認(rèn))-->歸0
					分鐘/小時(shí)-->+1
				reset-->
					秒-->分鐘-->小時(shí)
*/
module clock
(
    input   wire        sys_clk         ,   //系統(tǒng)時(shí)鐘50MHZ
    input   wire        sys_rst_n       ,   //復(fù)位
        
	input   wire        light_an        ,   //控制亮度
    input   wire        mooe_an         ,   //功能按鍵
    input   wire        start_an        ,   //調(diào)整數(shù)值按鍵
    input   wire        reset_an        ,   //切換區(qū)域按鍵	
				
	output  reg         led             ,   //做鬧鐘用  LEDR0  閃爍
    output  reg [3:0]   led_mode        ,   //顯示當(dāng)前模式    LEDR17-LEDR14
    output  wire [6:0]  SG0,SG1,SG2,SG3,SG4,SG5,SG6,SG7 //數(shù)碼管的值  	7-6,4-3,1-0顯示數(shù)字  5,2顯示:				
);
reg [1:0]   mode;//模式, mooe按鍵控制       

wire        light,mooe,start,reset;     //按鍵脈沖,高電平有效 
wire        clk1s_flag,clk10ms_flag;    //時(shí)鐘標(biāo)志位

wire [7:0]  sec,min,hour;               //時(shí)鐘變量寄存
wire [7:0]  min_keti,sec_keti,misec_keti;//計(jì)時(shí)變量寄存
wire [7:0]  min_alarm,hour_alarm ;      //鬧鐘變量寄存

//1s,10ms時(shí)鐘產(chǎn)生模塊
clk clk_inst
(
    .sys_clk      (sys_clk      )   ,   //系統(tǒng)時(shí)鐘50MHZ
    .sys_rst_n    (sys_rst_n    )   ,   //復(fù)位

	.clk1s_flag   (clk1s_flag   )   ,   //1s時(shí)鐘脈沖標(biāo)志位
    .clk10ms_flag (clk10ms_flag )       //10ms時(shí)鐘脈沖標(biāo)志位  
);

//mode改變
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)  
        mode <= 2'd0;
    else if(mooe && (mode == 2'd3))
        mode <= 2'd0;
    else if(mooe)
        mode <= mode + 1'd1;
    else
        mode <= mode;
//led_mode-顯示當(dāng)前模式
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        led_mode <= 4'b0000;
    else
        case(mode)
			0:led_mode <= 4'b1000;
			1:led_mode <= 4'b0100;
			2:led_mode <= 4'b0010;
			3:led_mode <= 4'b0001;
            default: led_mode <= 4'b1000;
        endcase
//0.顯示功能+ 3.時(shí)間設(shè)置
clockdisplay clockdisplay_inst
(
    .sys_clk   (sys_clk     )      ,   //系統(tǒng)時(shí)鐘50MHZ
    .sys_rst_n (sys_rst_n   )      ,   //復(fù)位   
    .mode      (mode        )      ,   //模式-相當(dāng)于使能
	.clk1s_flag(clk1s_flag  )      ,   //1s脈沖	

    .mooe      (mooe        )      ,   //調(diào)整功能按鍵
    .start     (start       )      ,   //開(kāi)始暫停計(jì)數(shù)
    .reset     (reset       )      ,   //置0
    
	.sec_out   (sec         )      ,   //顯示-秒
    .min_out   (min         )      ,   //顯示-分鐘
    .hour_out  (hour        )         //顯示-小時(shí)
);
//1.計(jì)數(shù)功能
keeptime keeptime_inst
(
    .sys_clk      (sys_clk      )   ,   //系統(tǒng)時(shí)鐘50MHZ
    .sys_rst_n    (sys_rst_n    )   ,   //復(fù)位   
    .mode         (mode         )   ,   //模式-相當(dāng)于使能
	.clk10ms_flag (clk10ms_flag )   ,   //10ms脈沖

    .mooe         (mooe         )   ,   //調(diào)整功能按鍵
    .start        (start        )   ,   //開(kāi)始暫停計(jì)數(shù)
    .reset        (reset        )   ,   //置0

	.min_keti     (min_keti     )   ,   //計(jì)時(shí)-分鐘
    .sec_keti     (sec_keti     )   ,   //計(jì)時(shí)-秒
    .misec_keti   (misec_keti   )      //計(jì)時(shí)-10ms    
);    
//2.鬧鐘調(diào)整
alarmclock alarmclock_inst
(
    .sys_clk   (sys_clk   )      ,   //系統(tǒng)時(shí)鐘50MHZ
    .sys_rst_n (sys_rst_n )      ,   //復(fù)位   
    .mode      (mode      )      ,   //模式-相當(dāng)于使能

    .mooe      (mooe      )      ,   //調(diào)整功能按鍵
    .start     (start     )      ,   //開(kāi)始暫停計(jì)數(shù)
    .reset     (reset     )      ,   //置0

	.min_alarm (min_alarm )      ,   //鬧鐘-分鐘
    .hour_alarm(hour_alarm)          //鬧鐘-小時(shí)
);

//鬧鐘報(bào)警-1分鐘燈閃爍
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        led <= 1'b0;
    else if(min != min_alarm || hour != hour_alarm)
        led <= 1'b0;
    else if((hour == hour_alarm) && (min == min_alarm) && clk1s_flag)
        led <= ~led;
//數(shù)碼管顯示模塊
segdisplay segdisplay_inst
(
    .sys_clk   (sys_clk   )     ,   //系統(tǒng)時(shí)鐘50MHZ
    .sys_rst_n (sys_rst_n )     ,   //復(fù)位   
    .mode      (mode      )     ,   //模式-相當(dāng)于使能
    .light     (light     )     ,   //控制顯示亮度
    //時(shí)鐘變量
    .sec       (sec       )     ,   
    .min       (min       )     ,   
    .hour      (hour      )     ,   
    //計(jì)時(shí)變量
    .min_keti  (min_keti  )     ,   
    .sec_keti  (sec_keti  )     ,   
    .misec_keti(misec_keti)     ,       
    //鬧鐘變量
    .min_alarm (min_alarm )     ,   
    .hour_alarm(hour_alarm)     ,   
    //數(shù)碼管的值  	7-6,4-3,1-0顯示數(shù)字  5,2顯示:
    .SG0       (SG0)            ,
    .SG1       (SG1)            ,
    .SG2       (SG2)            ,
    .SG3       (SG3)            ,
    .SG4       (SG4)            ,
    .SG5       (SG5)            ,
    .SG6       (SG6)            ,
    .SG7       (SG7)
);	

//按鍵濾波器,按下按鍵產(chǎn)生一個(gè)高脈沖
key_filiter key_filiter_inst0
(
	.sys_clk  (sys_clk  )   ,
	.sys_rst_n(sys_rst_n)      ,
	.key_in   (light_an) ,
	.key_flag (light)
);
key_filiter key_filiter_inst1
(
	.sys_clk  (sys_clk  )   ,
	.sys_rst_n(sys_rst_n)      ,
	.key_in   (mooe_an) ,
	.key_flag (mooe)
);
key_filiter key_filiter_inst2
(
	.sys_clk  (sys_clk  )   ,
	.sys_rst_n(sys_rst_n)      ,
	.key_in   (start_an) ,
	.key_flag (start)
);
key_filiter key_filiter_inst3
(
	.sys_clk  (sys_clk  )   ,
	.sys_rst_n(sys_rst_n)      ,
	.key_in   (reset_an) ,
	.key_flag (reset)
);


endmodule

2.2 按鍵消抖模塊key_filiter

按鍵濾波器,按下按鈕后即低電平輸入,經(jīng)過(guò)該模塊輸出一個(gè)系統(tǒng)時(shí)鐘周期的高脈沖。
本次實(shí)驗(yàn)使用的四個(gè)按鍵都是通過(guò)這個(gè)模塊產(chǎn)生高脈沖起作用。

//按鍵濾波器,按下按鈕后即低電平輸入,經(jīng)過(guò)該模塊輸出一個(gè)系統(tǒng)時(shí)鐘周期的高脈沖
module	key_filiter
(
	input		sys_clk     ,
	input		sys_rst_n   ,
	input		key_in      ,
	output	reg	key_flag
);

reg	[19:0]	cnt_20ms;
parameter	CNT_MAX=20'd999999;

always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		cnt_20ms<=20'd0;
	else	if(key_in)
		cnt_20ms<=20'd0;
	else	if(cnt_20ms==CNT_MAX)	//最大值保持
		cnt_20ms<=CNT_MAX;
	else
		cnt_20ms<=cnt_20ms+1'd1;
		
always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		key_flag<=1'b0;
	else	if(cnt_20ms==CNT_MAX-20'd1)
		key_flag<=1'b1;
	else
		key_flag<=1'b0;
		
endmodule

2.3 數(shù)字鐘1s/10ms時(shí)鐘產(chǎn)生模塊clk

本模塊輸入系統(tǒng)時(shí)鐘50MHZ與復(fù)位信號(hào),輸出1s/10ms時(shí)鐘脈沖標(biāo)志位,高電平有效
因?yàn)?個(gè)系統(tǒng)時(shí)鐘20ns,所以實(shí)現(xiàn)1s需要計(jì)數(shù)50_000_000次,10ms即500_000次

//1s,10ms時(shí)鐘產(chǎn)生模塊
module clk
(
    input   wire    sys_clk         ,   //系統(tǒng)時(shí)鐘50MHZ
    input   wire    sys_rst_n       ,   //復(fù)位
				
	output  reg     clk1s_flag      ,   //1s時(shí)鐘脈沖標(biāo)志位
    output  reg     clk10ms_flag        //10ms時(shí)鐘脈沖標(biāo)志位 
);
parameter CNT_MAX_1S = 28'd49_999_999;
parameter CNT_MAX_10MS = 20'd499_999;

reg [27:0]  clk_1s   ;
reg [19:0]  clk_10ms ;
//1s時(shí)鐘脈沖產(chǎn)生
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        clk_1s <= 28'd0;
    else if(clk_1s == CNT_MAX_1S)
        clk_1s <= 28'd0; 
    else
        clk_1s <= clk_1s + 1'd1;
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        clk1s_flag <= 1'b0;
    else if(clk_1s == CNT_MAX_1S-1)
        clk1s_flag <= 1'b1; 
    else
        clk1s_flag <= 1'b0;
//10ms時(shí)鐘脈沖產(chǎn)生
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        clk_10ms <= 20'd0;
    else if(clk_10ms == CNT_MAX_10MS)
        clk_10ms <= 20'd0; 
    else
        clk_10ms <= clk_10ms + 1'd1;
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        clk10ms_flag <= 1'b0;
    else if(clk_10ms == CNT_MAX_10MS-1)
        clk10ms_flag <= 1'b1; 
    else
        clk10ms_flag <= 1'b0;  
        
endmodule

2.4 時(shí)間顯示(模式0)與調(diào)整模塊(模式3)clockdisplay

輸入1s脈沖與3個(gè)按鍵,輸出時(shí)分秒
通過(guò)秒溢出分溢出時(shí)溢出之間的關(guān)系每秒時(shí)分秒值
當(dāng)進(jìn)入調(diào)試時(shí)間模式即模式3時(shí),時(shí)間停止,這時(shí)默認(rèn)更改秒,按下start按鍵,秒歸0,rst更改調(diào)整位置

/*
0  顯示
        小時(shí):0-23
		分鐘:0-59
		秒:0-59
3 時(shí)間設(shè)置
        start--
            秒(默認(rèn))-->歸0
            分鐘/小時(shí)-->+1
        reset-->
            秒-->分鐘-->小時(shí)
        mode-->返回時(shí)間顯示(按過(guò)start,reset)
*/
module clockdisplay
(
    input   wire            sys_clk         ,   //系統(tǒng)時(shí)鐘50MHZ
    input   wire            sys_rst_n       ,   //復(fù)位   
    input   wire [1:0]      mode            ,   //模式-相當(dāng)于使能
	input   wire            clk1s_flag      ,   //1s脈沖	
    
    input   wire            mooe            ,   //調(diào)整功能按鍵
    input   wire            start           ,   //開(kāi)始暫停計(jì)數(shù)
    input   wire            reset           ,   //調(diào)整位置
    
	output  reg [7:0]       sec_out         ,   //顯示-秒
    output  reg [7:0]       min_out         ,   //顯示-分鐘
    output  reg [7:0]       hour_out           //顯示-小時(shí)
);
reg [1:0]   position;//調(diào)整數(shù)據(jù)位置

//position;調(diào)整數(shù)據(jù)位置  0-秒,1-分,2-時(shí)
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        position <= 2'd0;
    else if(mode != 2'd3) 
        position <= 2'd0;
    else if((mode == 2'd3) && reset && (position == 2'd2))
        position <= 2'd0;
    else if((mode == 2'd3) && reset)  //每按下一次reset建位置更改一次
        position <= position + 1'd1;   
 
//秒產(chǎn)生
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)  
        sec_out <= 8'd57;
    else if((mode != 2'd3) && clk1s_flag && (sec_out == 8'd59))
        sec_out <= 8'd0;
    else if((mode != 2'd3) && clk1s_flag) //秒產(chǎn)生  
        sec_out <= sec_out + 1'd1;
    //mode == 2'd3
    else if((mode == 2'd3) && (position == 2'd0) && start) //mode==3即時(shí)間設(shè)置,按下start秒清0
        sec_out <= 8'd0; 
//分產(chǎn)生
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        min_out <= 8'd59;
    else if((mode != 2'd3) && clk1s_flag && (min_out == 8'd59) && (sec_out == 8'd59))
        min_out <= 8'd0;
    else if((mode != 2'd3) && clk1s_flag && (sec_out == 8'd59)) //分產(chǎn)生
        min_out <= min_out + 1'd1;
    //mode == 2'd3
    else if((mode == 2'd3) && (position == 2'd1) && start && (min_out == 8'd59)) //分鐘==59,按下start秒分清0
        min_out <= 8'd0;
    else if((mode == 2'd3) && (position == 2'd1) && start)  //mode==3即時(shí)間設(shè)置,按下start分加一 
        min_out <= min_out + 1'd1; 
//時(shí)產(chǎn)生
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        hour_out <= 8'd23;
    else if((mode != 2'd3) && clk1s_flag && (hour_out == 8'd23) && (min_out == 8'd59) && (sec_out == 8'd59))
        hour_out <= 8'd0;
    else if((mode != 2'd3) && clk1s_flag && (min_out == 8'd59) && (sec_out == 8'd59))
        hour_out <= hour_out + 1'd1;   
    //mode == 2'd3
    else if((mode == 2'd3) && (position == 2'd1) && start && (hour_out == 8'd23) && (min_out == 8'd59))  //分鐘溢出且小時(shí)==23,時(shí)清0
        hour_out <= 8'd0;
    else if((mode == 2'd3) && (position == 2'd2) && start && (hour_out == 8'd23))   //小時(shí)==23,按下start秒時(shí)清0
        hour_out <= 8'd0;    
    else if((mode == 2'd3) && (position == 2'd2) && start) //mode==3即時(shí)間設(shè)置,按下start時(shí)加一 
        hour_out <= hour_out + 1'd1;   
                     
endmodule

2.5 計(jì)時(shí)(模式1)模塊keeptime

這兒我們使用10ms脈沖用于實(shí)現(xiàn)秒表計(jì)數(shù).輸出計(jì)時(shí)三個(gè)數(shù)值用于顯示
原理跟時(shí)間顯示差不多,都是溢出判斷即可
進(jìn)入模式1后,按下start開(kāi)始計(jì)時(shí),再次按下暫停,按下rst計(jì)時(shí)歸0
注意:進(jìn)入模式1后,數(shù)字鐘時(shí)間正常運(yùn)行,但是此時(shí)顯示計(jì)時(shí)值

/*
mooe
1  計(jì)時(shí)
        分鐘:秒:99   
		start-->開(kāi)始計(jì)時(shí)(1)-->暫停計(jì)時(shí)(0)-->開(kāi)始計(jì)時(shí)...
		reset-歸零
        //mode-->返回時(shí)間顯示(按過(guò)start,reset)
*/
module keeptime
(
    input   wire        sys_clk         ,   //系統(tǒng)時(shí)鐘50MHZ
    input   wire        sys_rst_n       ,   //復(fù)位   
    input   wire [1:0]  mode            ,   //模式-相當(dāng)于使能
	input   wire        clk10ms_flag    ,   //10ms脈沖
	
    input   wire        mooe            ,   //調(diào)整功能按鍵
    input   wire        start           ,   //開(kāi)始暫停計(jì)數(shù)
    input   wire        reset           ,   //置0
      
	output  reg [7:0]   min_keti        ,   //計(jì)時(shí)-分鐘
    output  reg [7:0]   sec_keti        ,   //計(jì)時(shí)-秒
    output  reg [7:0]   misec_keti         //計(jì)時(shí)-10ms
);

reg keeptime_flag;//控制計(jì)數(shù)啟動(dòng)暫停變量

//keeptime_flag;//控制計(jì)數(shù)啟動(dòng)暫停變量 0-停止/暫停,1-啟動(dòng)
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        keeptime_flag <= 1'b0;
    else if(mode != 2'd1)   
        keeptime_flag <= 1'b0;
    else if((mode == 2'd1) && start)
        keeptime_flag <= ~keeptime_flag;
    else if((mode == 2'd1) && reset)
        keeptime_flag <= 1'b0;
//misec_keti  計(jì)時(shí)-10ms
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n) 
        misec_keti <= 8'd0;
    else if(mode != 2'd1)
        misec_keti <= 8'd0;
    else if(reset || (mode == 2'd1 && keeptime_flag && clk10ms_flag && misec_keti == 99))  //按下reset按鍵 或者 計(jì)滿99  us清0
        misec_keti <= 8'd0;
    else if(mode == 2'd1 && keeptime_flag && clk10ms_flag) //keeptime_flag==1,啟動(dòng)計(jì)時(shí)
        misec_keti <= misec_keti + 1'd1;
//sec_keti 計(jì)時(shí)-秒
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n) 
        sec_keti <= 8'd0;
    else if(mode != 2'd1)
        sec_keti <= 8'd0;
    else if(reset || (mode == 2'd1 && keeptime_flag && clk10ms_flag && sec_keti == 59))  //按下reset按鍵 或者 計(jì)滿59  s清0 
        sec_keti <= 8'd0;
    else if(mode == 2'd1 && keeptime_flag && clk10ms_flag && misec_keti == 99)  //keeptime_flag==1,misec_keti溢出sec_keti++
        sec_keti <= sec_keti + 1'd1;
//min_keti 計(jì)時(shí)-分鐘 
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n) 
        min_keti <= 8'd0;
    else if(mode != 2'd1)
        min_keti <= 8'd0;
    else if(reset || (mode == 2'd1 && keeptime_flag && clk10ms_flag && min_keti == 59)) //按下reset按鍵 或者 計(jì)滿59  分清0  
        min_keti <= 8'd0;
    else if(mode == 2'd1 && keeptime_flag && clk10ms_flag && sec_keti == 59 && misec_keti == 99)    //keeptime_flag==1,misec_keti溢出min_keti++
        min_keti <= min_keti + 1'd1;

endmodule

2.6 鬧鐘調(diào)整(模式2)模塊alarmclock

此模塊用于對(duì)鬧鐘數(shù)值的調(diào)整,根據(jù)輸入的按鍵,輸出調(diào)整后的鬧鐘值
進(jìn)入模式2后,按下start默認(rèn)調(diào)整鬧鐘分+1,按下rst調(diào)節(jié)鬧鐘時(shí)
注意:進(jìn)入模式2后,數(shù)字鐘時(shí)間正常運(yùn)行,但是此時(shí)顯示鬧鐘設(shè)置時(shí)分值

/*
2 鬧鐘設(shè)置
		start--加1(默認(rèn)分鐘)
		reset--切換小時(shí)/分鐘設(shè)置		默認(rèn)分鐘-->小時(shí)-->分鐘
			小時(shí):0-23
			分鐘:0-59
		mode-->返回時(shí)間顯示(按過(guò)start,reset)
*/                
module alarmclock
(
    input   wire        sys_clk         ,   //系統(tǒng)時(shí)鐘50MHZ
    input   wire        sys_rst_n       ,   //復(fù)位   
    input   wire [1:0]  mode            ,   //模式-相當(dāng)于使能
	
    input   wire        mooe            ,   //調(diào)整功能按鍵
    input   wire        start           ,   //開(kāi)始暫停計(jì)數(shù)
    input   wire        reset           ,   //置0
      
	output  reg [7:0]   min_alarm       ,   //鬧鐘-分鐘
    output  reg [7:0]   hour_alarm         //鬧鐘-小時(shí)
);
reg position;//調(diào)整數(shù)據(jù)位置

//position;調(diào)整數(shù)據(jù)位置 0-分鐘設(shè)置,1-小時(shí)設(shè)置
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        position <= 1'b0;
    else if(mode != 2'd2)
        position <= 1'b0;
    else if(reset)
        position <= ~position;
//min_alarm//鬧鐘-分鐘        
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        min_alarm <= 8'd0;
    else if((mode == 2'd2) && (!position) && (start) && (min_alarm == 8'd59))//溢出清0
        min_alarm <= 8'd0;
    else if((mode == 2'd2) && (!position) && (start))  //mode == 2'd2,按下start鍵,鬧鐘-分鐘+1
        min_alarm <= min_alarm + 1'd1;
//hour_alarm//鬧鐘-小時(shí)
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        hour_alarm <= 8'd0;
    else if((mode == 2'd2) && (!position) && (start) && (min_alarm == 8'd59) && (hour_alarm == 8'd23))//鬧鐘-分鐘+1,且小時(shí)==23溢出清0
        hour_alarm <= 8'd0;
    else if((mode == 2'd2) && (position) && (start) && (hour_alarm == 8'd23))   //鬧鐘-小時(shí)+1,且小時(shí)==23溢出清0
        hour_alarm <= 8'd0;
    else if((mode == 2'd2) && (position) && (start))    //mode == 2'd2,按下start鍵,鬧鐘-小時(shí)+1
        hour_alarm <= hour_alarm + 1'd1;        
               
endmodule

2.7 數(shù)碼管顯示模塊segdisplay

此模塊輸入之前各模塊運(yùn)算得出的數(shù)值,輸出到數(shù)碼管顯示
還包括調(diào)光功能,使用PWM波實(shí)現(xiàn),按下light調(diào)節(jié),共分5檔

//數(shù)碼管顯示模塊
module segdisplay
(
    input   wire        sys_clk         ,   //系統(tǒng)時(shí)鐘50MHZ
    input   wire        sys_rst_n       ,   //復(fù)位   
    input   wire [1:0]  mode            ,   //模式-相當(dāng)于使能
	input   wire        light           ,   //控制顯示亮度
    //時(shí)鐘變量
    input   wire [7:0]  sec             ,   
    input   wire [7:0]  min             ,   
    input   wire [7:0]  hour            ,   
    //計(jì)時(shí)變量
    input   wire [7:0]  min_keti        ,   
    input   wire [7:0]  sec_keti        ,   
    input   wire [7:0]  misec_keti      ,       
	//鬧鐘變量  
    input   wire [7:0]  min_alarm       ,   
    input   wire [7:0]  hour_alarm      ,   

    output  reg [6:0]   SG0,SG1,SG2,SG3,SG4,SG5,SG6,SG7 //數(shù)碼管的值  	7-6,4-3,1-0顯示數(shù)字  5,2顯示:
);
parameter	CNT_1US_MAX=6'd49;			//1個(gè)時(shí)鐘20ns,50個(gè)即1us
parameter	CNT_1MS_MAX=10'd999;		//計(jì)滿1000個(gè)即1ms
parameter   unit = 4'd5;

reg [9:0]   tim;
reg	[5:0]	cnt_1us;
reg	[9:0]	cnt_1ms; 

wire [3:0]  sec_ten,sec_unit,min_ten,min_unit,hour_ten,hour_unit;//時(shí)鐘變量顯示
wire [3:0]  minketi_ten,minketi_unit,secketi_ten,secketi_unit,misecketi_ten,misecketi_unit;//計(jì)數(shù)變量顯示變量
wire [3:0]  minalarm_ten,minalarm_unit,houralarm_ten,houralarm_unit;//鬧鐘變量顯示變量

assign sec_ten=sec/10;assign sec_unit=sec%10;
assign min_ten=min/10;assign min_unit=min%10;
assign hour_ten=hour/10;assign hour_unit=hour%10;

assign minketi_ten=min_keti/10;assign minketi_unit=min_keti%10;
assign secketi_ten=sec_keti/10;assign secketi_unit=sec_keti%10;
assign misecketi_ten=misec_keti/10;assign misecketi_unit=misec_keti%10;

assign minalarm_ten=min_alarm/10;assign minalarm_unit=min_alarm%10;
assign houralarm_ten=hour_alarm/10;assign houralarm_unit=hour_alarm%10;
//1us脈沖產(chǎn)生
always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		cnt_1us<=6'd0;
	else if(cnt_1us==CNT_1US_MAX)
		cnt_1us<=6'd0;
	else
		cnt_1us<=cnt_1us+6'd1;
//1ms脈沖產(chǎn)生
always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		cnt_1ms<=10'd0;
	else if((cnt_1ms==CNT_1MS_MAX)&&(cnt_1us==CNT_1US_MAX))
		cnt_1ms<=10'd0;
	else if(cnt_1us==CNT_1US_MAX)
		cnt_1ms<=cnt_1ms+10'd1;
	else
		cnt_1ms<=cnt_1ms;		
//亮度變量調(diào)整
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
        tim <= 10'd0;
    else if(tim >= 10'd999)
        tim <= 10'd0;
    else if(light)
        tim <= tim + 10'd200;
    else
        tim <= tim;
//數(shù)碼管顯示
always @(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)  
        begin
            SG0 <= 7'b1111111;
            SG1 <= 7'b1111111;
            SG3 <= 7'b1111111;
            SG4 <= 7'b1111111;
            SG6 <= 7'b1111111;
            SG7 <= 7'b1111111;
            SG2 <= 7'b1111111;
            SG5 <= 7'b1111111;
        end	
	else if(cnt_1ms<=tim)
        begin
            SG0 <= 7'b1111111;
            SG1 <= 7'b1111111;
            SG3 <= 7'b1111111;
            SG4 <= 7'b1111111;
            SG6 <= 7'b1111111;
            SG7 <= 7'b1111111;
            SG2 <= 7'b1111111;
            SG5 <= 7'b1111111;
        end	
    else
        begin
            if(mode == 2'd0)//時(shí)鐘顯示
            begin
                SG2 <= 7'b0111111;
                SG5 <= 7'b0111111;
                case(sec_unit)
                        0:SG0<=7'b1000000; 1:SG0<=7'b1111001;
                        2:SG0<=7'b0100100; 3:SG0<=7'b0110000;
                        4:SG0<=7'b0011001; 5:SG0<=7'b0010010;
                        6:SG0<=7'b0000010; 7:SG0<=7'b1111000;
                        8:SG0<=7'b0000000; 9:SG0<=7'b0010000; //7段譯碼值 
                        default: SG0 <= 7'b1111111;
                endcase
                case(sec_ten)
                        0:SG1<=7'b1000000; 1:SG1<=7'b1111001;
                        2:SG1<=7'b0100100; 3:SG1<=7'b0110000;
                        4:SG1<=7'b0011001; 5:SG1<=7'b0010010;
                        6:SG1<=7'b0000010; 7:SG1<=7'b1111000;
                        8:SG1<=7'b0000000; 9:SG1<=7'b0010000; //7段譯碼值 
                        default: SG1 <= 7'b1111111;
                endcase
                case(min_unit)
                        0:SG3<=7'b1000000; 1:SG3<=7'b1111001;
                        2:SG3<=7'b0100100; 3:SG3<=7'b0110000;
                        4:SG3<=7'b0011001; 5:SG3<=7'b0010010;
                        6:SG3<=7'b0000010; 7:SG3<=7'b1111000;
                        8:SG3<=7'b0000000; 9:SG3<=7'b0010000; //7段譯碼值 
                        default: SG3 <= 7'b1111111;
                endcase
                case(min_ten)
                        0:SG4<=7'b1000000; 1:SG4<=7'b1111001;
                        2:SG4<=7'b0100100; 3:SG4<=7'b0110000;
                        4:SG4<=7'b0011001; 5:SG4<=7'b0010010;
                        6:SG4<=7'b0000010; 7:SG4<=7'b1111000;
                        8:SG4<=7'b0000000; 9:SG4<=7'b0010000; //7段譯碼值 
                        default: SG4 <= 7'b1111111;
                endcase
                case(hour_unit)
                        0:SG6<=7'b1000000; 1:SG6<=7'b1111001;
                        2:SG6<=7'b0100100; 3:SG6<=7'b0110000;
                        4:SG6<=7'b0011001; 5:SG6<=7'b0010010;
                        6:SG6<=7'b0000010; 7:SG6<=7'b1111000;
                        8:SG6<=7'b0000000; 9:SG6<=7'b0010000; //7段譯碼值
                        default: SG6 <= 7'b1111111;                    
                endcase
                case(hour_ten)
                        0:SG7<=7'b1000000; 1:SG7<=7'b1111001;
                        2:SG7<=7'b0100100; 3:SG7<=7'b0110000;
                        4:SG7<=7'b0011001; 5:SG7<=7'b0010010;
                        6:SG7<=7'b0000010; 7:SG7<=7'b1111000;
                        8:SG7<=7'b0000000; 9:SG7<=7'b0010000; //7段譯碼值 
                        default: SG7 <= 7'b1111111;
                endcase		
            end
            else if(mode == 2'd1)//計(jì)時(shí)顯示
            begin
                SG2 <= 7'b0111111;
                SG5 <= 7'b0111111;
                case(misecketi_unit)
                        0:SG0<=7'b1000000; 1:SG0<=7'b1111001;
                        2:SG0<=7'b0100100; 3:SG0<=7'b0110000;
                        4:SG0<=7'b0011001; 5:SG0<=7'b0010010;
                        6:SG0<=7'b0000010; 7:SG0<=7'b1111000;
                        8:SG0<=7'b0000000; 9:SG0<=7'b0010000; //7段譯碼值 
                        default: SG0 <= 7'b1111111;
                endcase
                case(misecketi_ten)
                        0:SG1<=7'b1000000; 1:SG1<=7'b1111001;
                        2:SG1<=7'b0100100; 3:SG1<=7'b0110000;
                        4:SG1<=7'b0011001; 5:SG1<=7'b0010010;
                        6:SG1<=7'b0000010; 7:SG1<=7'b1111000;
                        8:SG1<=7'b0000000; 9:SG1<=7'b0010000; //7段譯碼值 
                        default: SG1 <= 7'b1111111;
                endcase
                case(secketi_unit)
                        0:SG3<=7'b1000000; 1:SG3<=7'b1111001;
                        2:SG3<=7'b0100100; 3:SG3<=7'b0110000;
                        4:SG3<=7'b0011001; 5:SG3<=7'b0010010;
                        6:SG3<=7'b0000010; 7:SG3<=7'b1111000;
                        8:SG3<=7'b0000000; 9:SG3<=7'b0010000; //7段譯碼值 
                        default: SG3 <= 7'b1111111;
                endcase
                case(secketi_ten)
                        0:SG4<=7'b1000000; 1:SG4<=7'b1111001;
                        2:SG4<=7'b0100100; 3:SG4<=7'b0110000;
                        4:SG4<=7'b0011001; 5:SG4<=7'b0010010;
                        6:SG4<=7'b0000010; 7:SG4<=7'b1111000;
                        8:SG4<=7'b0000000; 9:SG4<=7'b0010000; //7段譯碼值 
                        default: SG4 <= 7'b1111111;
                endcase
                case(minketi_unit)
                        0:SG6<=7'b1000000; 1:SG6<=7'b1111001;
                        2:SG6<=7'b0100100; 3:SG6<=7'b0110000;
                        4:SG6<=7'b0011001; 5:SG6<=7'b0010010;
                        6:SG6<=7'b0000010; 7:SG6<=7'b1111000;
                        8:SG6<=7'b0000000; 9:SG6<=7'b0010000; //7段譯碼值
                        default: SG6 <= 7'b1111111;                    
                endcase
                case(minketi_ten)
                        0:SG7<=7'b1000000; 1:SG7<=7'b1111001;
                        2:SG7<=7'b0100100; 3:SG7<=7'b0110000;
                        4:SG7<=7'b0011001; 5:SG7<=7'b0010010;
                        6:SG7<=7'b0000010; 7:SG7<=7'b1111000;
                        8:SG7<=7'b0000000; 9:SG7<=7'b0010000; //7段譯碼值 
                        default: SG7 <= 7'b1111111;
                endcase		
            end
            else if(mode == 2'd2)//鬧鐘設(shè)置顯示
            begin
                SG0 <= 7'b1111111;
                SG1 <= 7'b1111111;
                SG2 <= 7'b1111111;
                case(minalarm_unit)
                        0:SG3<=7'b1000000; 1:SG3<=7'b1111001;
                        2:SG3<=7'b0100100; 3:SG3<=7'b0110000;
                        4:SG3<=7'b0011001; 5:SG3<=7'b0010010;
                        6:SG3<=7'b0000010; 7:SG3<=7'b1111000;
                        8:SG3<=7'b0000000; 9:SG3<=7'b0010000; //7段譯碼值 
                        default: SG3 <= 7'b1111111;
                endcase
                case(minalarm_ten)
                        0:SG4<=7'b1000000; 1:SG4<=7'b1111001;
                        2:SG4<=7'b0100100; 3:SG4<=7'b0110000;
                        4:SG4<=7'b0011001; 5:SG4<=7'b0010010;
                        6:SG4<=7'b0000010; 7:SG4<=7'b1111000;
                        8:SG4<=7'b0000000; 9:SG4<=7'b0010000; //7段譯碼值 
                        default: SG4 <= 7'b1111111;
                endcase
                case(houralarm_unit)
                        0:SG6<=7'b1000000; 1:SG6<=7'b1111001;
                        2:SG6<=7'b0100100; 3:SG6<=7'b0110000;
                        4:SG6<=7'b0011001; 5:SG6<=7'b0010010;
                        6:SG6<=7'b0000010; 7:SG6<=7'b1111000;
                        8:SG6<=7'b0000000; 9:SG6<=7'b0010000; //7段譯碼值
                        default: SG6 <= 7'b1111111;                    
                endcase
                case(houralarm_ten)
                        0:SG7<=7'b1000000; 1:SG7<=7'b1111001;
                        2:SG7<=7'b0100100; 3:SG7<=7'b0110000;
                        4:SG7<=7'b0011001; 5:SG7<=7'b0010010;
                        6:SG7<=7'b0000010; 7:SG7<=7'b1111000;
                        8:SG7<=7'b0000000; 9:SG7<=7'b0010000; //7段譯碼值 
                        default: SG7 <= 7'b1111111;
                endcase		
            end
            else if(mode == 2'd3)//時(shí)鐘設(shè)置顯示
            begin
                SG2 <= 7'b0111111;
                SG5 <= 7'b0111111;
                case(sec_unit)
                        0:SG0<=7'b1000000; 1:SG0<=7'b1111001;
                        2:SG0<=7'b0100100; 3:SG0<=7'b0110000;
                        4:SG0<=7'b0011001; 5:SG0<=7'b0010010;
                        6:SG0<=7'b0000010; 7:SG0<=7'b1111000;
                        8:SG0<=7'b0000000; 9:SG0<=7'b0010000; //7段譯碼值 
                        default: SG0 <= 7'b1111111;
                endcase
                case(sec_ten)
                        0:SG1<=7'b1000000; 1:SG1<=7'b1111001;
                        2:SG1<=7'b0100100; 3:SG1<=7'b0110000;
                        4:SG1<=7'b0011001; 5:SG1<=7'b0010010;
                        6:SG1<=7'b0000010; 7:SG1<=7'b1111000;
                        8:SG1<=7'b0000000; 9:SG1<=7'b0010000; //7段譯碼值 
                        default: SG1 <= 7'b1111111;
                endcase
                case(min_unit)
                        0:SG3<=7'b1000000; 1:SG3<=7'b1111001;
                        2:SG3<=7'b0100100; 3:SG3<=7'b0110000;
                        4:SG3<=7'b0011001; 5:SG3<=7'b0010010;
                        6:SG3<=7'b0000010; 7:SG3<=7'b1111000;
                        8:SG3<=7'b0000000; 9:SG3<=7'b0010000; //7段譯碼值 
                        default: SG3 <= 7'b1111111;
                endcase
                case(min_ten)
                        0:SG4<=7'b1000000; 1:SG4<=7'b1111001;
                        2:SG4<=7'b0100100; 3:SG4<=7'b0110000;
                        4:SG4<=7'b0011001; 5:SG4<=7'b0010010;
                        6:SG4<=7'b0000010; 7:SG4<=7'b1111000;
                        8:SG4<=7'b0000000; 9:SG4<=7'b0010000; //7段譯碼值 
                        default: SG4 <= 7'b1111111;
                endcase
                case(hour_unit)
                        0:SG6<=7'b1000000; 1:SG6<=7'b1111001;
                        2:SG6<=7'b0100100; 3:SG6<=7'b0110000;
                        4:SG6<=7'b0011001; 5:SG6<=7'b0010010;
                        6:SG6<=7'b0000010; 7:SG6<=7'b1111000;
                        8:SG6<=7'b0000000; 9:SG6<=7'b0010000; //7段譯碼值
                        default: SG6 <= 7'b1111111;                    
                endcase
                case(hour_ten)
                        0:SG7<=7'b1000000; 1:SG7<=7'b1111001;
                        2:SG7<=7'b0100100; 3:SG7<=7'b0110000;
                        4:SG7<=7'b0011001; 5:SG7<=7'b0010010;
                        6:SG7<=7'b0000010; 7:SG7<=7'b1111000;
                        8:SG7<=7'b0000000; 9:SG7<=7'b0010000; //7段譯碼值 
                        default: SG7 <= 7'b1111111;
                endcase		
            end	        
        end
    
endmodule

以上就是本次實(shí)驗(yàn)的全部代碼。

modelsim仿真的實(shí)驗(yàn)代碼

`timescale  1ns/1ns
module  tb_clock();

//模塊相關(guān)數(shù)據(jù)定義
reg        sys_clk         ;  //系統(tǒng)時(shí)鐘50MHZ
reg        sys_rst_n       ;  //復(fù)位
                           
reg        light_an       ;   //控制亮度
reg        mooe_an         ;  //功能按鍵
reg        start_an        ;  //調(diào)整數(shù)值按鍵
reg        reset_an        ;  //切換區(qū)域按鍵	
	                       
wire         led            ;   //做鬧鐘用  LEDR0  閃爍
wire [3:0]   led_mode       ;   //顯示當(dāng)前模式    LEDR17-LEDR14
wire [6:0]  SG0,SG1,SG2,SG3,SG4,SG5,SG6,SG7; //數(shù)碼管的值  	7-6,4-3,1-0顯示數(shù)字  5,2顯示:


//sys_clk,sys_rst_n初始賦值,模擬觸摸按鍵信號(hào)值
initial
    begin
        sys_clk     <=   1'b1 ;
        sys_rst_n   <=   1'b0 ;
        light_an    <=   1'b1 ;
        start_an    <=   1'b1  ;
        reset_an    <=   1'b1  ;
        mooe_an     <=   1'b1  ;
        #30
        sys_rst_n  <=   1'b1 ;
        #1000
        mooe_an    <=   1'b0 ;
        #100
        mooe_an    <=   1'b1 ;
        #100
        mooe_an    <=   1'b0 ;
        #100
        mooe_an    <=   1'b1 ;
        #100
        mooe_an    <=   1'b0 ;
        #100
        mooe_an    <=   1'b1 ;
        #100
        start_an   <=   1'b0;
        #100
        start_an   <=   1'b1;
        #100
        reset_an   <=   1'b0;
        #100
        reset_an   <=   1'b1;
        #100
        start_an   <=   1'b0;
        #100
        start_an   <=   1'b1;
        #100
        reset_an   <=   1'b0;
        #100
        reset_an   <=   1'b1;
        #100
        start_an   <=   1'b0;
        #100
        start_an   <=   1'b1;
        #100
        mooe_an    <=   1'b0 ;
        #100
        mooe_an    <=   1'b1 ;
    end

//clk:產(chǎn)生時(shí)鐘
always  #10 sys_clk = ~sys_clk ;

//重定義模塊內(nèi)部CNT溢出值
defparam clock_inst.clk_inst.CNT_MAX_1S = 100'd49;
defparam clock_inst.clk_inst.CNT_MAX_10MS = 100'd19;
defparam clock_inst.key_filiter_inst0.CNT_MAX = 100'd5;
defparam clock_inst.key_filiter_inst1.CNT_MAX = 100'd5;
defparam clock_inst.key_filiter_inst2.CNT_MAX = 100'd5;
defparam clock_inst.key_filiter_inst3.CNT_MAX = 100'd5;

//模塊例化
clock clock_inst
(
    .sys_clk   (sys_clk  )      ,   //系統(tǒng)時(shí)鐘50MHZ
    .sys_rst_n (sys_rst_n)      ,   //復(fù)位

	.light_an  (light_an )      ,   //控制亮度
    .mooe_an   (mooe_an  )      ,   //功能按鍵
    .start_an  (start_an )      ,   //調(diào)整數(shù)值按鍵
    .reset_an  (reset_an )      ,   //切換區(qū)域按鍵	

	.led       (led      )      ,   //做鬧鐘用  LEDR0  閃爍
    .led_mode  (led_mode )      ,   //顯示當(dāng)前模式    LEDR17-LEDR14
    .SG0       (SG0)            ,
    .SG1       (SG1)            ,
    .SG2       (SG2)            ,
    .SG3       (SG3)            ,
    .SG4       (SG4)            ,
    .SG5       (SG5)            ,
    .SG6       (SG6)            ,
    .SG7       (SG7)			
);
endmodule

3.實(shí)物驗(yàn)證

系統(tǒng)啟動(dòng)默認(rèn)時(shí)間從23:59:57開(kāi)始,左下角燈為模式顯示燈
quartus時(shí)鐘代碼,集成電路EDA,fpga開(kāi)發(fā),fpga
系統(tǒng)自動(dòng)走了一段時(shí)間,可以看到正常進(jìn)位
quartus時(shí)鐘代碼,集成電路EDA,fpga開(kāi)發(fā),fpga
按下light調(diào)節(jié)亮度
quartus時(shí)鐘代碼,集成電路EDA,fpga開(kāi)發(fā),fpga
按下mooe按鍵調(diào)節(jié)到模式1計(jì)時(shí)模式,啟動(dòng)
quartus時(shí)鐘代碼,集成電路EDA,fpga開(kāi)發(fā),fpga
再次按下mooe按鍵調(diào)節(jié)到模式2,進(jìn)行鬧鐘調(diào)整
quartus時(shí)鐘代碼,集成電路EDA,fpga開(kāi)發(fā),fpga
再次按下mooe按鍵調(diào)節(jié)到模式3,進(jìn)行時(shí)間調(diào)整
quartus時(shí)鐘代碼,集成電路EDA,fpga開(kāi)發(fā),fpga
再次按下mooe按鍵回到模式1,正常顯示時(shí)鐘
quartus時(shí)鐘代碼,集成電路EDA,fpga開(kāi)發(fā),fpga文章來(lái)源地址http://www.zghlxwxcb.cn/news/detail-762987.html

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