MemTest86 History - from 1994

MemTest86 was?originally?developed by Chris Brady (BradyTech Inc) with a first release in 1994.

However, some of the?testing algorithms?used have been under development since 1981 and have been previously implemented on Dec PDP-11, VAX-11/780 and Cray XMP architectures.

Since then there has been more than a dozen new versions being released. Support for 64bit, new CPU types,?symmetrical multiprocessors?and many other features have been added during this period.

MemTest86 was released as?free?open source (GPL) software.

MemTest86 and MemTest86+

被不同人發(fā)展出來了一系列的版本，所謂是百花齊放百家爭鳴且螺旋式優(yōu)化改進啊~

MemTest86 the new era

新時代（64bit、DDR4）的到來，面臨新的挑戰(zhàn)。
In Feb 2013, PassMark Software took over the maintenance of the MemTest86 project from Chris.

This was around the time that a lot of technological changes were occurring. The 64bit era was here, DDR4 was coming, UEFI had already arrived and Microsoft's Secure boot technology threatened to prevent MemTest86 from booting on future PC hardware.

Starting from MemTest86 v5, the code was re-written to support self booting from the newer UEFI platform. UEFI is able to provide additional services that is unavailable in BIOS, such as graphical, mouse and file system support. Support for DDR4 & 64bit were also added and Microsoft agreed to code sign MemTest86 for secure boot.

The software (Free Edition) still remains free to use without restrictions. The MemTest86 v4 project is still maintained and remains open source, for use on old machines with BIOS. From V5 however the software is being released under a proprietary license. For advanced/enthusiast users or commercial applications, a professional version is available for users that require additional customizability and advanced features that may be more suitable for their testing needs. A comparison of the different versions can be found here. We have also created a support forum where users can discuss issues.

它的歷史軌跡參考如下鏈接PassMark MemTest86 - Version Historyhttps://www.memtest86.com/whats-new.html

???????MemTest86定義

MemTest86 is the original, free, stand alone memory testing software for x86 computers. MemTest86 boots from a USB flash drive or CD and tests the RAM in your computer for?faults?using a series of?comprehensive algorithms and test patterns.

指出：首先是免費，其次是使用了一些測試pattern跟綜合算法來測試內(nèi)存的缺陷。

特點：（就關注這兩點）

• 13 different RAM testing algorithms
  +DDR4 RAM (and DDR2 & DDR3) support
• 測試算法發(fā)展了20年了，初代目早在1994年就出現(xiàn)了

這是memtest86的測試項：

By running MemTest, you can ensure that your computers RAM is?correctly functioning.

只能測功能；

Unlike other memory checking software, MemTest is designed to?find all types of memory errors?including intermittent problems.

找到所有的內(nèi)存缺陷；

Therefore, it needs to be run for?several hours?to truly evaluate your RAM. MemTest works with any type of memory.

代價就是要測好幾個小時；

Test 0 [Address test, walking ones, no cache]

測試0 [地址測試，步行測試，無緩存]

Tests all address bits in all memory banks by using a walking ones address pattern.

?使用步進地址模式測試所有存儲庫中的所有地址位。?

walking ones address pattern測試地址位；

Test 1 [Address test, own address，1 cpu]

測試1 [地址測試，自己的地址，順序]
Each address is written with its own address and then is checked for consistency. In theory previous tests should have caught any memory addressing problems. This test should catch any addressing errors that somehow were not previously detected.

每個地址都有自己的地址，然后檢查一致性。從理論上講，以前的測試應該可以解決所有內(nèi)存問題。該測試應捕獲以前未檢測到的任何尋址錯誤。該測試是對每個可用CPU依次進行的。?

補充第一個測試缺陷的；

Test 2?[Address test, own address]

測試2 [地址測試，自己的地址，并行]

??與測試1相同，但測試使用所有CPU并使用重疊的地址并行完成。??

Test 3?[Moving inversions, ones&zeros]

測試3 [移動反演，一和零，并行]
This test uses the moving inversions algorithm with patterns of all ones and zeros. Cache is enabled even though it interferes to some degree with the test algorithm. With cache enabled this test does not take long and should quickly find all "hard" errors and some more subtle errors. This test is only a quick check.

該測試使用具有全1和全0模式的移動反演算法。即使已在某種程度上影響測試算法，也會啟用緩存。啟用緩存后，此測試不會花費很長時間，并且應該很快找到所有“硬”錯誤以及一些更細微的錯誤。使用所有CPU并行執(zhí)行此操作。

快速檢查出異常使用moving inversions algorithm with patterns of all ones and zeros.

Test 4?[Moving inversions, 8 bit pat]

測試4 [移動反相，8位模式]
This is the same as test one but uses a 8 bit wide pattern of "walking" ones and zeros. This test will better detect subtle errors in "wide" memory chips. A total of 20?data patterns?are used.

???這與測試3相同，但是使用8位寬的“行走” 1和0模式。該測試將更好地檢測“寬”存儲芯片中的細微錯誤。?

算法同第一個測試項，但是使用的是8bit位寬，能檢測更微小的內(nèi)存錯誤；

Test 5?[Moving inversions, random pattern]

測試5 [移動反演，隨機模式]???????
Test 5?uses the same algorithm as test 1 but the data pattern is a random number and it's complement. This test is particularly effective in finding difficult to detect?data sensitive errors. A total of 60 patterns are used. The random number sequence is different with each pass so multiple passes increase effectiveness.

測試5使用與測試4相同的算法，但是數(shù)據(jù)模式是一個隨機數(shù)并且是補碼。該測試對于發(fā)現(xiàn)難以檢測的數(shù)據(jù)敏感錯誤特別有效。每次通過的隨機數(shù)順序都不同，因此多次通過可提高有效性。?

找出數(shù)據(jù)敏感型異常（基于隨機數(shù)）；

Test 6?[Block move, 64 moves]

測試6 [整步，64步]
This test stresses memory by using block move (movsl) instructions and is based on Robert Redelmeier's burnBX test. Memory is initialized with shifting patterns that are inverted every 8 bytes. Then 4mb blocks of memory are moved around using the movsl instruction. After the moves are completed the data patterns are checked. Because the data is checked only after the memory moves are completed it is not possible to know where the error occurred. The addresses reported are only for where the bad pattern was found. Since the moves are constrained to a 8mb segment of memory the failing address will always be less than 8mb away from the reported address. Errors from this test are not used to calculate BadRAM patterns.

此測試通過使用塊移動（movsl）指令對內(nèi)存進行壓力測試，該測試基于Robert Redelmeier的burnBX測試。使用每8個字節(jié)反轉(zhuǎn)一次的移位模式來初始化內(nèi)存。然后使用movsl指令移動4mb的內(nèi)存塊。移動完成后，將檢查數(shù)據(jù)模式。由于僅在完成內(nèi)存移動后才檢查數(shù)據(jù)，因此無法知道錯誤發(fā)生在何處。報告的地址僅適用于發(fā)現(xiàn)錯誤模式的位置。由于移動被限制在一個8mb的內(nèi)存段中，因此失敗的地址將始終與所報告的地址相距小于8mb。此測試的錯誤不用于計算BadRAM模式。?

內(nèi)存塊移動方式來進行壓力測試；

Test 7?[Moving inversions, 32 bit pat]

測試7 [反向移動，32位模式]
This is a variation of the moving inversions algorithm that shifts the data pattern left one bit for each successive address. The starting bit position is shifted left for each pass. To use all possible data patterns 32 passes are required. This test is quite effective at detecting data sensitive errors but the execution time is long.

這是移動反演算法的一種變體，該算法針對每個連續(xù)地址將數(shù)據(jù)模式左移一位。每次通過時，起始位位置向左移動。為了使用所有可能的數(shù)據(jù)模式，需要32次通過。該測試對于檢測數(shù)據(jù)敏感錯誤非常有效，但是執(zhí)行時間很長。?

Test 8?[Random number sequence]

測試8 [隨機數(shù)順序]
This test writes a series of random numbers into memory. By resetting the seed for the random number the same sequence of number can be created for a reference. The initial pattern is checked and then complemented and checked again on the next pass. However, unlike the moving inversions test writing and checking can only be done in the forward direction.

該測試將一系列隨機數(shù)寫入內(nèi)存。通過為隨機數(shù)重置種子，可以創(chuàng)建相同的數(shù)字序列作為參考。首先檢查初始模式，然后在下一個遍次進行補充和再次檢查。但是，與移動反轉(zhuǎn)不同，測試編寫和檢查只能在正向進行。

寫一個序列的隨機值進內(nèi)存，只能一個方向；

Test 9?[Modulo 20, ones&zeros]

測試9 [模20，隨機模式]
Using the Modulo-X algorithm should uncover errors that are not detected by moving inversions due to cache and buffering interference with the the algorithm. As with test one only ones and zeros are used for data patterns.

使用Modulo-X算法應該發(fā)現(xiàn)由于對算法的緩存和緩沖干擾而無法通過移動反轉(zhuǎn)檢測到的錯誤

移動逆轉(zhuǎn)由于cache的作用可能會覆蓋不全某些異常，因此Modulo-X算法補充之；

Test 10?[Bit fade test, 90 min, 2 patterns]

測試10 [位淡入測試，2種模式]
The bit fade test initializes all of memory with a pattern and then sleeps for 90 minutes. Then memory is examined to see if any memory bits have changed. All ones and all zero patterns are used. This test takes 3 hours to complete. The Bit Fade test is not included in the normal test sequence and must be run manually via the runtime configuration menu.

?位淡入淡出測試會使用某種模式初始化所有內(nèi)存，然后休眠幾分鐘。然后檢查內(nèi)存以查看是否有任何內(nèi)存位已更改。使用全1和全零模式。?

睡90分鐘后看是不是數(shù)據(jù)掉了。???????

Test 13?[Hammer test]

測試13 [錘測試]

? 行錘測試暴露出DDR3、DDR4或更高版本的根本缺陷。當在短時間內(nèi)重復訪問同一存儲體但不同行中的地址時，此缺陷可能導致干擾錯誤。行的重復打開/關閉會導致相鄰行中的電荷泄漏，從而可能導致位翻轉(zhuǎn)。?
? 該測試通過交替讀取??兩個地址來“錘擊”行，然后驗證其他地址的內(nèi)容是否存在干擾錯誤。有關DRAM干擾錯誤的更多詳細信息，請參見Yoongu Kim等人的“不訪問就翻轉(zhuǎn)內(nèi)存中的位：DRAM干擾錯誤的實驗研究”。?
? 從MemTest86 v6.2開始，可能會兩次通過行錘測試。在第一遍中，地址對以最高可能的速率被錘擊。如果在第一次通過時檢測到錯誤，則不會立即報告錯誤，而是開始第二次通過。在此過程中，地址對被內(nèi)存供應商認為是最壞情況的速率降低（每64ms 200K次訪問）。如果在此過程中還檢測到錯誤，則將錯誤照常報告給用戶。但是，如果僅第一遍產(chǎn)生錯誤，則會向用戶顯示警告消息。?

異常顯示

Error Display
Memtest has two options for reporting errors. The default is to report individual errors. Memtest is also able to create patterns used by the Linux BadRAM feature. This slick feature allows Linux to avoid bad memory pages.?

For individual errors the following information is displayed when a memory error is detected. An error message is only displayed for errors with a different address or failing bit pattern. All displayed values are in hexadecimal.

Tst: Test Number

Failing Address: Failing memory address

Good: Expected data pattern

Bad: Failing data pattern

Err-Bits: Exclusive or of good and bad data (this shows the position of the failing bit(s))

Count: Number of consecutive errors with the same address and failing bits Error Display

問題定位

Troubleshooting Memory Errors
Please be aware that not all errors reported by Memtest86 are due to bad memory.
The test implicitly tests the **CPU, L1 and L2 caches as well as the motherboard. **

講到這算發(fā)測出異常了大概率是memory出問題了，小概率是是板子啊CPU啊cache啊出問題了。

It is impossible for the test to determine what causes the failure to occur. However, most failures will be due to a problem with memory. When it is not, the only option is to replace parts until the failure is corrected.

出問題時按下面步驟來定溫問題：
there are steps that may be taken to determine the failing module. Here are four techniques that you may wish to use:

1. Removing modules

2. Rotating modules

3. Replacing modules

4. Avoiding allocation

兼容問題導致異常。

Memtest86 can not diagnose many types of PC failures. For example a faulty CPU that causes Windows to crash will most likely just cause Memtest86 to crash in the same way.

就是用戶用來檢測內(nèi)存是否可用的，系統(tǒng)是否有異常的。

執(zhí)行時間

The time required for a complete pass of Memtest86 will vary greatly depending on CPU speed, memory speed and memory size. Here are the execution times from a Pentium-II-366 with?64mb?of RAM:
Test 0 0:05
Test 1 0:18
Test 2 1:02
Test 3 1:38
Test 4 8:05
Test 5 1:40
Test 6 4:24
Test 7 6:04
Total (default tests) 23:16

Test 8 12:30
Test 9 49:30
Test 10 30:34
Test 11 3:29:40
Total (all tests) 5:25:30

Memtest86 continues executes indefinitely. The pass counter increments each time that all of the selected tests have been run. Generally a single pass is sufficient to catch all but the most obscure errors. However, for complete confidence when intermittent errors are suspected testing for a longer period is advised.

為了發(fā)現(xiàn)間歇性問題，多測幾輪還是很有必要的。

內(nèi)存測試理念

Memory Testing Philosophy
There are many good approaches for testing memory. However, many tests simply throw some patterns at memory without much thought or knowledge of the memory architecture or how errors can best be detected. This works fine for hard memory failures but does little to find intermittent errors.

大多測試算法沒有針對特定的存儲架構(gòu)做優(yōu)化，因此測出來的都是致命性問題，間歇性的問題一般很難找出來。
The BIOS based memory tests are useless for finding intermittent memory errors.
基于BIOS的測試對間歇性異常無能為力。

Memory chips consist of a large array of tightly packed memory cells, one for each bit of data. The vast majority of the intermittent failures are a result of interaction between these memory cells. Often writing a memory cell can cause one of the adjacent cells to be written with the same data. An effective memory test should attempt to test for this condition. Therefore, an ideal strategy for testing memory would be the following:

1. write a cell with a zero
2. write all of the adjacent cells with a one, one or more times
3. check that the first cell still has a zero

這就是測1被0包圍或者0被1包圍的臨近測試場景、

It should be obvious that this strategy requires an exact knowledge of how the memory cells are laid out on the chip.

很明顯地我們需要知道內(nèi)存在實際地三維空間中是如何排列的。

In addition there is a never ending number of possible chip layouts for different chip types and manufacturers making this strategy impractical. However, there are testing algorithms that can approximate this ideal.

布局不同測試算法就不同，因此我們很難搞適配?。∵€好，有算法能搞定這個問題。

臨近耦合缺陷測試算法

Memtest86 uses two algorithms that provide a reasonable approximation of the ideal test strategy?above.

moving inversions算法

解決相鄰cell互相影響的問題。

The first of these strategies is called moving inversions. The moving inversion test works as follows:

1. Fill memory with a pattern
2. Starting at the lowest address
   2a check that the pattern has not changed
   2b write the patterns complement
   2c increment the address
   repeat 2a - 2c
3. Starting at the highest address
   3a check that the pattern has not changed
   3b write the patterns complement
   3c decrement the address
   repeat 3a - 3c

由于上了平臺而不是在測試機，因此我們不能針對每個bit，一位一位連續(xù)著寫（因為我們平臺最多支持Byte操作），因此只能折中，把一些pattern組合著寫入進去，少了一些動態(tài)過程。

This algorithm is a good approximation of an ideal memory test but there are some?limitations. Most high density chips today store data 4 to 16 bits wide. With chips that are more than one bit wide it is impossible to selectively read or write just one bit. This means that we cannot guarantee that all adjacent cells have been tested for interaction. In this case the best we can do is to use some patterns to insure that all adjacent cells have at least been written with all possible one and zero combinations.

同時caching、buffering都是不會使你的讀寫操作變連續(xù)的，因為會緩存嘛，這就使得本來要連續(xù)操作的變成斷斷續(xù)續(xù)了，要不得，因此我們整了個Modulo-X 算法來解決這個問題，其實就是一個很常規(guī)的操作：我們把數(shù)據(jù)填充滿cache或者buffer（高級特性無法關閉）這樣就會自動觸發(fā)flush操作，從而不會滯留數(shù)據(jù)了。

It can also be seen that caching, buffering and out of order execution will interfere with the moving inversions algorithm and make less effective. It is possible to turn off cache but the memory buffering in new high performance chips can not be disabled. To address this limitation a new algorithm I call Modulo-X was created. This algorithm is not affected by cache or buffering. The algorithm works as follows:

1. For starting offsets of 0 - 20 do
   1a write every 20th location with a pattern
   1b write all other locations with the patterns complement
   repeat 1b one or more times
   1c check every 20th location for the pattern

This algorithm accomplishes nearly the same level of adjacency testing as moving inversions but is not affected by caching or buffering.

于是就實現(xiàn)了adjacency testing as moving inversions，且不受caching or buffering的影響。

Since separate write passes (1a, 1b) and the read pass (1c) are done for all of memory we can be assured that all of the buffers and cache have been flushed between passes. The selection of 20 as the stride size was somewhat arbitrary.

大的步進會使得更高效，但是會使得測試時長加大，因此折中速度和吞吐率.(我們是全空間讀寫，因此這里可以設置大一點喲！)

Larger strides may be more effective but would take longer to execute. The choice of 20 seemed to be a reasonable compromise between speed and thoroughness.

單項測試描述（靜態(tài)異常？）

Memtest86 executes a series of numbered test sections to check for errors.

These test sections consist of a combination of?test algorithm, data pattern and cache setting.

The?execution order?for these tests were arranged so that errors will be detected as rapidly as possible.

Tests 8, 9, 10 and 11 are very long running extended tests and are only executed when?extended testing?is selected.

The extended tests have a low probability of finding errors that were missed by the default tests.

A description of each of the test sections follows:

Test 0 [Address test, walking ones, no cache]

Tests all address bits in all memory banks by using a walking ones address pattern.

Test 1 [Moving Inv, ones&zeros, cached]

This test uses the moving inversions algorithm with patterns of only ones and zeros.

Cache is enabled even though it interferes to some degree with the test algorithm. With cache enabled this test does not take long and should quickly find all "hard" errors and some more subtle errors. This test is only a quick check.

Test 2 [Address test, own address, no cache]

Each address is written with its own address and then is checked for consistency.

In theory previous tests should have caught any memory addressing problems. This test should catch any addressing errors that?somehow?were not previously detected.

Test 3 [Moving inv, 8 bit pat, cached]

This is the same as test one but uses a 8 bit wide pattern of "walking" ones and zeros. This test will?better detect subtle errors in "wide" memory chips.

A total of 20 data patterns are used.

Test 4 [Moving inv, 32 bit pat, cached]

This is a variation of the moving inversions algorithm that shifts the data pattern left one bit for each successive address.

The starting bit position is shifted left for each pass. To use all possible data patterns?32 passes?are required.

This test is effective in detecting** data sensitive** errors in "wide" memory chips.

Test 5 [Block move, 64 moves, cached]

This test stresses memory by using block move (movsl) instructions and is based on Robert Redelmeier's burnBX test.

Memory is initialized with shifting patterns that are inverted every 8 bytes. Then 4mb blocks of memory are moved around using the movsl instruction.

After the moves are completed the data patterns are checked. Because the data is checked only after the memory moves are completed it is not possible to know where the error occurred.

The addresses reported are only for where the bad pattern was found. Since the moves are constrained to a 8mb segment of memory the failing address will always be less than 8mb away from the reported address. Errors from this test are not used to calculate BadRAM patterns.

Test 6 [Modulo 20, ones&zeros, cached]

Using the Modulo-X algorithm should uncover errors that are not detected by moving inversions due to cache and buffering interference with the the algorithm. As with test one only ones and zeros are used for data patterns.

Test 7 [Moving inv, ones&zeros, no cache]

This is the same as test one but without cache. With cache off there will be much less interference with the test algorithm. However, the execution time is much, much longer. This test may find very subtle errors missed by previous tests.

Test 8 [Block move, 512 moves, cached]

This is the first extended test. This is the same as test #5 except that we do more memory moves before checking memory. Errors from this test are not used to calculate BadRAM patterns.

Test 9 [Moving inv, 8 bit pat, no cache]

By using an 8 bit pattern with cache off this test should be effective in detecting all types of errors. However, it takes a very long time to execute and there is a low probability that it will detect errors not found by the previous tests.

Test 10 [Modulo 20, 8 bit, cached]

This is the first test to use the Modulo-X algorithm with a?data pattern?other than ones and zeros. This combination of algorithm and data pattern should be quite effective. However, it's very long execution time relegates it to the extended test section.

Test 11 [Moving inv, 32 bit pat, no cache]

This test should be the most effective in finding errors that are data pattern sensitive. However, without cache it's execution time is excessively long.

總結(jié)：就是從用戶的角度來看，設立不同的測試場景即測試用例，然后針對性地進行功能測試，注意是從系統(tǒng)級來測試，也就是說關注的不僅僅是內(nèi)存顆粒了，而是在系統(tǒng)板級的連線、IO性能、PCB等等相關的因素一同考慮進去后，你的memory是否還能功能正常；文章來源地址http://www.zghlxwxcb.cn/news/detail-596142.html

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