實(shí)驗(yàn)描述：
輸入：兩個4位二進(jìn)制數(shù)，代表兩個操作數(shù)A，B；一個3位控制信號operation，代表ALU要進(jìn)行的運(yùn)算。本實(shí)驗(yàn)中，ALU可以實(shí)現(xiàn)8種運(yùn)算：
輸出：4位結(jié)果，1位進(jìn)位
operation | F
000 | A + B
001 | A - B
010 | B + 1
011 | B - 1
100 | NOT A
101 | A XOR B
110 | A AND B
111 | A OR B
實(shí)現(xiàn)代碼：
/*********************
* By VastCosmic
* 2021/12/26
*********************/
module ALU(A,B,operation,result,cout);
input[3:0] A;
input[3:0] B;
input[2:0] operation;
output reg[3:0] result;
output reg cout;
always @(A or B or operation)
begin
case(operation)
//A+B
3'b000: begin result <= A + B;end
//A-B
3'b001: begin result <= A - B;end
//B+1
3'b010: begin result <= B + 1;end
//B-1
3'b011: begin result <= B - 1;end
//NOT A
3'b100: begin result <= ~A;end
//A XOR B
3'b101: begin result = A ^ B;end
//A AND B
3'b110: begin result = A & B;end
//A OR B
3'b111: begin result = A | B;end
endcase
end
endmodule
TestBench:
/*********************
* By VastCosmic
* 2021/12/26
*********************/
`timescale 1ns/10ps
module ALU_tb;
reg [3:0] A;
reg [3:0] B;
reg [2:0] operation;
wire [3:0] result;
wire cout;
ALU ALU(A,B,operation,result,cout);
initial
begin
A<=0000;B<=0000;operation <= 000; //initial
#10 A<=0001;B<=0001;operation <= 000; //A + B 0010
#10 A<=0001;B<=0001;operation <= 001; //A - B 0000
#10 A<=0001;B<=0001;operation <= 010; //B + 1 0010
#10 A<=0001;B<=0001;operation <= 011; //B - 1 0000
#10 A<=1001;B<=0001;operation <= 100; //NOT A 0110
#10 A<=0001;B<=0010;operation <= 101; //A XOR B
#10 A<=0001;B<=0001;operation <= 110; //A AND B
#10 A<=0001;B<=0000;operation <= 110; //A AND B
#10 A<=0001;B<=0000;operation <= 111; //A OR B
#10 A<=0000;B<=0000;operation <= 111; //A OR B
#10 $stop;
end
endmodule
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