• • 1. 設(shè)備樹移植
  • 2. MACB驅(qū)動移植
  • 3. 網(wǎng)絡(luò)連通性調(diào)試
    • 3-1. MACB驅(qū)動環(huán)回測試
    • 3-2. YT8521 PHY工作模式及電壓確認(rèn)
    • 3-3. YT8521 PHY環(huán)回測試
    • 3-4. YT8521 PHY tx delay調(diào)整

macb0: ethernet@3200c000 {
		compatible = "cdns,phytium-gem-1.0";
		reg = <0x0 0x3200c000 0x0 0x2000>;
		interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
						<GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
						...
						<GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>,
						<GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
		clock-names = "pclk", "hclk", "tx_clk", "tsu_clk";
		clocks = <&sysclk_250mhz>, <&sysclk_48mhz>, <&sysclk_48mhz>, <&sysclk_250mhz>;
		magic-packet;
		status = "okay";
		phy-mode = "rgmii";
        use-mii;
        };

drivers/net/ethernet/cadence/macb_main.c:

static const struct macb_config phytium_gem1p0_config = {
	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE |
			MACB_CAPS_JUMBO |
			MACB_CAPS_GEM_HAS_PTP |
			MACB_CAPS_BD_RD_PREFETCH |
			MACB_CAPS_SEL_CLK,
	.dma_burst_length = 16,
	.clk_init = phytium_clk_init,
	.init = phytium_init,
	.jumbo_max_len = 16360,
	.sel_clk_hw = phytium_gem1p0_sel_clk,
};

static const struct of_device_id macb_dt_ids[] = {
	...
	{ .compatible = "cdns,phytium-gem-1.0", .data = &phytium_gem1p0_config },
	...
}

drivers/net/ethernet/cadence/macb_main.c:
static void macb_mac_link_up(struct phylink_config *config,
			     struct phy_device *phy,
			     unsigned int mode, phy_interface_t interface,
			     int speed, int duplex,
			     bool tx_pause, bool rx_pause)
{
... ...
			if (bp->caps & MACB_CAPS_SEL_CLK)
					bp->sel_clk_hw(bp, speed);
... ...
}

static void macb_handle_link_change(struct net_device *dev)
{
... ...
                        if (bp->caps & MACB_CAPS_SEL_CLK_HW)
                                phytium_gem_sel_clk(bp);
... ...
}

drivers/net/ethernet/cadence/macb_main.c:

static const struct macb_config phytium_gem1p0_config = {
	.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE |
			MACB_CAPS_JUMBO |
			MACB_CAPS_GEM_HAS_PTP |
			MACB_CAPS_BD_RD_PREFETCH |
			MACB_CAPS_SEL_CLK_HW,
	.dma_burst_length = 16,
	.clk_init = macb_clk_init,
	.init = macb_init,
	.jumbo_max_len = 16360,
	//.sel_clk_hw = phytium_gem1p0_sel_clk,
};

static const struct of_device_id macb_dt_ids[] = {
	...
	{ .compatible = "cdns,phytium-gem-1.0", .data = &phytium_gem1p0_config },
	...
}

devmem2  $((0x32010000+0x00)) h #讀0x00寄存器的值
0x1c
devmem2  $((0x32010000+0x00)) h 0x1e #寫0x00寄存器，將bit1置1.

root@kylin:/opt/phytool# ./phytool write eth1/0x0/0x1e  0xa001 && ./phytool eth1/0x0/0x1f
ieee-phy: reg:0x1f val:0x8140

./phytool write eth1/0x0/0x00 0x4140
./phytool eth1/0x0/0x00

drivers/net/ethernet/cadence/macb_main.c:
static void macb_set_tx_clk(struct clk *clk, int speed, struct net_device *dev)
{
... ...
        switch (speed) {
... ...
        case SPEED_1000:
                rate = 125000000;
                break;
        default:
                return;
        }

        rate_rounded = clk_round_rate(clk, rate);
        if (rate_rounded < 0)
                return;

        /* RGMII allows 50 ppm frequency error. Test and warn if this limit
         * is not satisfied.
         */
        ferr = abs(rate_rounded - rate);
        ferr = DIV_ROUND_UP(ferr, rate / 100000);
		
        if (ferr > 5)
                netdev_warn(dev, "unable to generate target frequency: %ld Hz\n",
                            rate);
        if (clk_set_rate(clk, rate_rounded))
                netdev_err(dev, "adjusting tx_clk failed.\n");
}

root@kylin:/opt/phytool# ./phytool write eth1/0x0/0x1e  0xa003 && ./phytool eth1/0x0/0x1f
ieee-phy: reg:0x1f val:0x00f1

./phytool write eth1/0x0/0x1e  0xa003
./phytool write eth1/0x0/0x1f 0x00f8